Senior ASIC Design Engineer
Company: Chelsea Search Group
Location: San Diego
Posted on: April 1, 2026
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Job Description:
Senior or Staff ASIC Design Engineer Key Responsibilities: •
Design and implement digital circuits using HDL (Verilog/ System
Verilog) • Perform synthesis, timing analysis, Lint, formal
equivalence, Clock Domain Crossing (CDC) analysis • Optimize
designs for performance, power, and area (PPA) requirements •
Perform RTL simulation and verification to ensure design
functionality • Participate in design reviews and provide technical
guidance to team members • Collaborate with cross-functional teams
on system integration and validation Qualifications: • Bachelor’s
or higher degree in Electrical Engineering, Computer Engineering,
or a related field • 7 years of experience in digital design and
verification • Proficiency in HDLs such as Verilog, or System
Verilog • Strong understanding of digital design principles and
methodologies • Familiarity with ASIC design flow, and experience
with ASIC design tools • Knowledge of low-power design techniques •
Familiarity with verification methodologies (e.g., UVM, formal
verification) • Excellent problem-solving, strong communication and
teamwork skills Preferred Skills: • Strong knowledge of Digital
Signal Processing (DSP), Digital Communication, and Forward Error
Correction (FEC) techniques • Experience with scripting languages
(e.g., Python, Tcl) • Understanding of Optical Communication
Standards is a plus • Ability to multitask and adapt to a
fast-paced, dynamic environment Javier Leon Talent Acquisition
Chelsea Search Group 619-227-3193 cell FJLrecruiter@gmail.com
www.LinkedIn.com/in/JavierLeon (are we connected?)
Keywords: Chelsea Search Group, Buena Park , Senior ASIC Design Engineer, Engineering , San Diego, California
